Photo Gallery

ASPLOS'20 - Session 8A - A Benchmark Suite for Evaluating Caches‘ Vulnerability to Timing Attacks
ASPLOS'20 - Session 8A - Hurdle: Securing Jump Instructions Against Code Reuse Attacks
ASPLOS'20 - Session 8A - Exploring Branch Predictors for Constructing Transient Execution Trojans
ASPLOS'20 - Session 8B - FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profil
ASPLOS'22 - Session 8A - PLD: Fast FPGA Compilation to Make Reconfigurable Acceleration Compatible
ASPLOS'20 - Session 6A - Data Center Power Oversubscription with a Medium Voltage Power Plane and Pr
ASPLOS'20 - Introduction to the conference by the General Chair -- Prof. James Larus
ASPLOS'23 - Session 8A - CaQR: A Compiler-assisted Approach for Qubit Reuse Through Dynamic Circuit
ASPLOS'20 - Session 9A - MOD: Minimally Ordered Durable Datastructures for Persistent Memory
ASPLOS'20 - Session 13B - The TrieJax Architecture: Accelerating Graph Operations Through Relational
ASPLOS'22 - Session 8A - Debugging in the Brave New World of Reconfigurable Hardware
ASPLOS'20 - Session 13B - Optimus Prime: Accelerating Data Transformation in Servers